diff options
author | Arnd Bergmann <arnd@arndb.de> | 2020-08-06 21:20:51 +0300 |
---|---|---|
committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-20 18:51:32 +0300 |
commit | 01e93a173935d11061721c3eb90a54f80719b54f (patch) | |
tree | 2fe779100c1bb9b1857a34a6015d0d8d8e1fcff0 /drivers/cpufreq/s3c2440-cpufreq.c | |
parent | 81994e0ffc373e67ace4c98797c35f8213f07753 (diff) | |
download | linux-01e93a173935d11061721c3eb90a54f80719b54f.tar.xz |
cpufreq: s3c24xx: split out registers
Each of the cpufreq drivers uses a fixed set of register
bits, copy those definitions into the drivers to avoid
including mach/regs-clock.h.
[krzk: Fix build by copying also S3C2410_LOCKTIME]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20200806182059.2431-34-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'drivers/cpufreq/s3c2440-cpufreq.c')
-rw-r--r-- | drivers/cpufreq/s3c2440-cpufreq.c | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/drivers/cpufreq/s3c2440-cpufreq.c b/drivers/cpufreq/s3c2440-cpufreq.c index 3f772ba8896e..5fe7a891fa13 100644 --- a/drivers/cpufreq/s3c2440-cpufreq.c +++ b/drivers/cpufreq/s3c2440-cpufreq.c @@ -24,11 +24,31 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/regs-clock.h> - #include <plat/cpu.h> #include <plat/cpu-freq-core.h> +#include <mach/map.h> + +#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) +#define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) +#define S3C2440_CAMDIVN S3C2410_CLKREG(0x18) + +#define S3C2440_CLKDIVN_PDIVN (1<<0) +#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1) +#define S3C2440_CLKDIVN_HDIVN_1 (0<<1) +#define S3C2440_CLKDIVN_HDIVN_2 (1<<1) +#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1) +#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1) +#define S3C2440_CLKDIVN_UCLK (1<<3) + +#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0) +#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4) +#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8) +#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9) +#define S3C2440_CAMDIVN_DVSEN (1<<12) + +#define S3C2442_CAMDIVN_CAMCLK_DIV3 (1<<5) + static struct clk *xtal; static struct clk *fclk; static struct clk *hclk; |