diff options
author | Kai Ye <yekai13@huawei.com> | 2021-11-20 07:47:36 +0300 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2021-11-26 08:25:17 +0300 |
commit | 376a5c3cdd7cf47d2436dd466548c0fff792f4c7 (patch) | |
tree | 6ce8b41023d8f91eecab69fde719c33a2ff01408 /drivers/crypto/hisilicon/zip | |
parent | d3b04a4398fe8022c9ca4b5ac6ab08059334b180 (diff) | |
download | linux-376a5c3cdd7cf47d2436dd466548c0fff792f4c7.tar.xz |
crypto: hisilicon - modify the value of engine type rate
Modify the value of type rate from new QM spec.
Signed-off-by: Kai Ye <yekai13@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/zip')
-rw-r--r-- | drivers/crypto/hisilicon/zip/zip_main.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c index 873971ef9aee..1a237d95d482 100644 --- a/drivers/crypto/hisilicon/zip/zip_main.c +++ b/drivers/crypto/hisilicon/zip/zip_main.c @@ -103,8 +103,8 @@ #define HZIP_PREFETCH_ENABLE (~(BIT(26) | BIT(17) | BIT(0))) #define HZIP_SVA_PREFETCH_DISABLE BIT(26) #define HZIP_SVA_DISABLE_READY (BIT(26) | BIT(30)) -#define HZIP_SHAPER_RATE_COMPRESS 252 -#define HZIP_SHAPER_RATE_DECOMPRESS 229 +#define HZIP_SHAPER_RATE_COMPRESS 750 +#define HZIP_SHAPER_RATE_DECOMPRESS 140 #define HZIP_DELAY_1_US 1 #define HZIP_POLL_TIMEOUT_US 1000 |