summaryrefslogtreecommitdiff
path: root/drivers/crypto/hisilicon/zip
diff options
context:
space:
mode:
authorLongfang Liu <liulongfang@huawei.com>2023-09-28 11:57:22 +0300
committerHerbert Xu <herbert@gondor.apana.org.au>2023-10-05 13:16:30 +0300
commit5831fc1fd4a578232fea708b82de0c666ed17153 (patch)
tree07bd5f661303394316c00a9c9c1f769b1c7be239 /drivers/crypto/hisilicon/zip
parente12a68b3c6ac2cecb365b57c639df71e3564d68b (diff)
downloadlinux-5831fc1fd4a578232fea708b82de0c666ed17153.tar.xz
crypto: hisilicon/qm - fix PF queue parameter issue
If the queue isolation feature is enabled, the number of queues supported by the device changes. When PF is enabled using the current default number of queues, the default number of queues may be greater than the number supported by the device. As a result, the PF fails to be bound to the driver. After modification, if queue isolation feature is enabled, when the default queue parameter is greater than the number supported by the device, the number of enabled queues will be changed to the number supported by the device, so that the PF and driver can be properly bound. Fixes: 8bbecfb402f7 ("crypto: hisilicon/qm - add queue isolation support for Kunpeng930") Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/zip')
-rw-r--r--drivers/crypto/hisilicon/zip/zip_main.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
index 0d5d1ee363e4..945ab3648a87 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -364,8 +364,11 @@ static u32 uacce_mode = UACCE_MODE_NOUACCE;
module_param_cb(uacce_mode, &zip_uacce_mode_ops, &uacce_mode, 0444);
MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC);
+static bool pf_q_num_flag;
static int pf_q_num_set(const char *val, const struct kernel_param *kp)
{
+ pf_q_num_flag = true;
+
return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_ZIP_PF);
}
@@ -1139,6 +1142,8 @@ static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
qm->qp_num = pf_q_num;
qm->debug.curr_qm_qp_num = pf_q_num;
qm->qm_list = &zip_devices;
+ if (pf_q_num_flag)
+ set_bit(QM_MODULE_PARAM, &qm->misc_ctl);
} else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V1) {
/*
* have no way to get qm configure in VM in v1 hardware,