diff options
| author | Srujana Challa <schalla@marvell.com> | 2021-05-25 14:27:16 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2021-06-03 15:24:05 +0300 |
| commit | eb33cd9116b2f1d193352c77bd829b61b1249b00 (patch) | |
| tree | 66e89d44729256887352470abb26e04ddcf62d32 /drivers/crypto/marvell/octeontx2/cn10k_cpt.h | |
| parent | 4cd8c3152edeb0a580e0552317606a1f90bc59ab (diff) | |
| download | linux-eb33cd9116b2f1d193352c77bd829b61b1249b00.tar.xz | |
crypto: octeontx2 - add support to map LMTST region for CN10K
On CN10K platform transmit/receive buffer alloc and free from/to
hardware had changed to support burst operation. Whereas pervious
silicon's only support single buffer free at a time.
To Support the same firmware allocates a DRAM region for each PF/VF for
storing LMTLINES. These LMTLINES are used to send CPT commands to HW.
PF/VF LMTST region is accessed via BAR4. PFs LMTST region is followed
by its VFs mbox memory. The size of region varies from 2KB to 256KB
based on number of LMTLINES configured.
This patch adds support for mapping of PF/VF LMTST region.
Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/marvell/octeontx2/cn10k_cpt.h')
| -rw-r--r-- | drivers/crypto/marvell/octeontx2/cn10k_cpt.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/crypto/marvell/octeontx2/cn10k_cpt.h b/drivers/crypto/marvell/octeontx2/cn10k_cpt.h new file mode 100644 index 000000000000..b9a8c463eaf3 --- /dev/null +++ b/drivers/crypto/marvell/octeontx2/cn10k_cpt.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only + * Copyright (C) 2021 Marvell. + */ +#ifndef __CN10K_CPT_H +#define __CN10K_CPT_H + +#include "otx2_cptpf.h" +#include "otx2_cptvf.h" + +int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf); +int cn10k_cptvf_lmtst_init(struct otx2_cptvf_dev *cptvf); + +#endif /* __CN10K_CPTLF_H */ |