diff options
| author | Srujana Challa <schalla@marvell.com> | 2021-04-15 15:28:37 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2021-04-22 10:31:31 +0300 |
| commit | b2d17df35ea5ff9b7c003e5060bb79edd6d4c9c5 (patch) | |
| tree | 80c29c25dc9f60a1bf81df8f58bc010cc87fb927 /drivers/crypto/marvell/octeontx2/otx2_cptlf.h | |
| parent | 66810912fd1e38fdd0405feb9f46fc23c024c70f (diff) | |
| download | linux-b2d17df35ea5ff9b7c003e5060bb79edd6d4c9c5.tar.xz | |
crypto: octeontx2 - add support for OcteonTX2 98xx CPT block.
OcteonTX2 series of silicons have multiple variants, the
98xx variant has two crypto (CPT0 & CPT1) blocks. This patch
adds support for firmware load on new CPT block(CPT1).
Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/marvell/octeontx2/otx2_cptlf.h')
| -rw-r--r-- | drivers/crypto/marvell/octeontx2/otx2_cptlf.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptlf.h b/drivers/crypto/marvell/octeontx2/otx2_cptlf.h index 314e97354100..ab1678fc564d 100644 --- a/drivers/crypto/marvell/octeontx2/otx2_cptlf.h +++ b/drivers/crypto/marvell/octeontx2/otx2_cptlf.h @@ -95,6 +95,7 @@ struct otx2_cptlfs_info { u8 kcrypto_eng_grp_num; /* Kernel crypto engine group number */ u8 kvf_limits; /* Kernel crypto limits */ atomic_t state; /* LF's state. started/reset */ + int blkaddr; /* CPT blkaddr: BLKADDR_CPT0/BLKADDR_CPT1 */ }; static inline void otx2_cpt_free_instruction_queues( |