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authorMarco Chiappero <marco.chiappero@intel.com>2021-08-12 23:21:26 +0300
committerHerbert Xu <herbert@gondor.apana.org.au>2021-08-21 10:44:56 +0300
commite6dac5ea6f8e68c1d4fda7ffb6903c33161b3b4e (patch)
tree540edd8dd355ef93ff67000056802c5b21032d9f /drivers/crypto/qat/qat_common/adf_vf_isr.c
parent9ffd49dfba6d5142189ceccf217ac315f8aac884 (diff)
downloadlinux-e6dac5ea6f8e68c1d4fda7ffb6903c33161b3b4e.tar.xz
crypto: qat - remove the unnecessary get_vintmsk_offset()
All QAT GEN2 devices share the same register offset for masking interrupts, so they don't need any complex device specific infrastructure. Remove this function in favor of a constant in order to simplify the code. Also, future generations may require a more complex device specific handling, making the current approach obsolete anyway. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Co-developed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Fiona Trahe <fiona.trahe@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat/qat_common/adf_vf_isr.c')
-rw-r--r--drivers/crypto/qat/qat_common/adf_vf_isr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_vf_isr.c b/drivers/crypto/qat/qat_common/adf_vf_isr.c
index aa44e8638fa8..078f33d583e8 100644
--- a/drivers/crypto/qat/qat_common/adf_vf_isr.c
+++ b/drivers/crypto/qat/qat_common/adf_vf_isr.c
@@ -36,7 +36,7 @@ void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
void __iomem *pmisc_bar_addr =
pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
- ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x0);
+ ADF_CSR_WR(pmisc_bar_addr, ADF_VINTMSK_OFFSET, 0x0);
}
void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
@@ -46,7 +46,7 @@ void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
void __iomem *pmisc_bar_addr =
pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
- ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x2);
+ ADF_CSR_WR(pmisc_bar_addr, ADF_VINTMSK_OFFSET, 0x2);
}
static int adf_enable_msi(struct adf_accel_dev *accel_dev)