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authorChristophe Leroy <christophe.leroy@c-s.fr>2019-05-21 16:34:18 +0300
committerHerbert Xu <herbert@gondor.apana.org.au>2019-05-30 10:30:04 +0300
commitc9cca7034b34a2d82e9a03b757de2485c294851c (patch)
tree3e808aa7b209be12a0d6a17f21e9a2a4f2f3292c /drivers/crypto/talitos.c
parenteae55a586c3c8b50982bad3c3426e9c9dd7a0075 (diff)
downloadlinux-c9cca7034b34a2d82e9a03b757de2485c294851c.tar.xz
crypto: talitos - Align SEC1 accesses to 32 bits boundaries.
The MPC885 reference manual states: SEC Lite-initiated 8xx writes can occur only on 32-bit-word boundaries, but reads can occur on any byte boundary. Writing back a header read from a non-32-bit-word boundary will yield unpredictable results. In order to ensure that, cra_alignmask is set to 3 for SEC1. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Fixes: 9c4a79653b35 ("crypto: talitos - Freescale integrated security engine (SEC) driver") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/talitos.c')
-rw-r--r--drivers/crypto/talitos.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index 7c8a3a717b91..750b0159e654 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -3327,7 +3327,10 @@ static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev,
alg->cra_priority = t_alg->algt.priority;
else
alg->cra_priority = TALITOS_CRA_PRIORITY;
- alg->cra_alignmask = 0;
+ if (has_ftr_sec1(priv))
+ alg->cra_alignmask = 3;
+ else
+ alg->cra_alignmask = 0;
alg->cra_ctxsize = sizeof(struct talitos_ctx);
alg->cra_flags |= CRYPTO_ALG_KERN_DRIVER_ONLY;