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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2019-05-21 16:34:18 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-07-26 10:12:28 +0300 |
| commit | e96316e561e872359b6e0f0951ac2864de4d58e1 (patch) | |
| tree | eff639ea84e9b32ab2963bb4a02fea8983d33be7 /drivers/crypto | |
| parent | 01f8f49d5350614c34ce4592677294bf89de93e4 (diff) | |
| download | linux-e96316e561e872359b6e0f0951ac2864de4d58e1.tar.xz | |
crypto: talitos - Align SEC1 accesses to 32 bits boundaries.
[ Upstream commit c9cca7034b34a2d82e9a03b757de2485c294851c ]
The MPC885 reference manual states:
SEC Lite-initiated 8xx writes can occur only on 32-bit-word boundaries, but
reads can occur on any byte boundary. Writing back a header read from a
non-32-bit-word boundary will yield unpredictable results.
In order to ensure that, cra_alignmask is set to 3 for SEC1.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Fixes: 9c4a79653b35 ("crypto: talitos - Freescale integrated security engine (SEC) driver")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/crypto')
| -rw-r--r-- | drivers/crypto/talitos.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c index 657cf739ee40..82d3625667cd 100644 --- a/drivers/crypto/talitos.c +++ b/drivers/crypto/talitos.c @@ -3192,7 +3192,10 @@ static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev, alg->cra_priority = t_alg->algt.priority; else alg->cra_priority = TALITOS_CRA_PRIORITY; - alg->cra_alignmask = 0; + if (has_ftr_sec1(priv)) + alg->cra_alignmask = 3; + else + alg->cra_alignmask = 0; alg->cra_ctxsize = sizeof(struct talitos_ctx); alg->cra_flags |= CRYPTO_ALG_KERN_DRIVER_ONLY; |