diff options
| author | Ira Weiny <ira.weiny@intel.com> | 2022-07-19 23:52:47 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-07-20 01:38:04 +0300 |
| commit | 3eddcc938581968d126e7345e9ec84c75290e7a4 (patch) | |
| tree | 886132191b9de5518044e99168776876e38d3d39 /drivers/cxl/Kconfig | |
| parent | 9d24322e887b6a3d3f9f9c3e76937a646102c8c1 (diff) | |
| download | linux-3eddcc938581968d126e7345e9ec84c75290e7a4.tar.xz | |
cxl/pci: Create PCI DOE mailbox's for memory devices
DOE mailbox objects will be needed for various mailbox communications
with each memory device.
Iterate each DOE mailbox capability and create PCI DOE mailbox objects
as found.
It is not anticipated that this is the final resting place for the
iteration of the DOE devices. The support of switch ports will drive
this code into the PCIe side. In this imagined architecture the CXL
port driver would then query into the PCI device for the DOE mailbox
array.
For now creating the mailboxes in the CXL port is good enough for the
endpoints. Later PCIe ports will need to support this to support switch
ports more generically.
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/20220719205249.566684-5-ira.weiny@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/Kconfig')
| -rw-r--r-- | drivers/cxl/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig index f64e3984689f..7adaaf80b302 100644 --- a/drivers/cxl/Kconfig +++ b/drivers/cxl/Kconfig @@ -2,6 +2,7 @@ menuconfig CXL_BUS tristate "CXL (Compute Express Link) Devices Support" depends on PCI + select PCI_DOE help CXL is a bus that is electrically compatible with PCI Express, but layers three protocols on that signalling (CXL.io, CXL.cache, and |