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author | Dan Williams <dan.j.williams@intel.com> | 2023-06-26 04:56:13 +0300 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2023-06-26 04:56:13 +0300 |
commit | 0c0df63177e37ae826d803280eb2c5b6b6a7a9a4 (patch) | |
tree | 5b158934251cb6537491371d3dd09fcf349a3102 /drivers/cxl/core/hdm.c | |
parent | d2f9fe695313b1e50028c1ec4cd09bea67152a60 (diff) | |
parent | 5d2ffbe4b81a3b6353bf888a523e7e5d4fec47ad (diff) | |
download | linux-0c0df63177e37ae826d803280eb2c5b6b6a7a9a4.tar.xz |
Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl
Pick up the first half of the RCH error handling series. The back half
needs some fixups for test regressions. Small conflicts with the PMU
work around register enumeration and setup helpers.
Diffstat (limited to 'drivers/cxl/core/hdm.c')
-rw-r--r-- | drivers/cxl/core/hdm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 715c1f103739..4449b34a80cc 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -85,6 +85,7 @@ static int map_hdm_decoder_regs(struct cxl_port *port, void __iomem *crb, struct cxl_component_regs *regs) { struct cxl_register_map map = { + .dev = &port->dev, .resource = port->component_reg_phys, .base = crb, .max_size = CXL_COMPONENT_REG_BLOCK_SIZE, @@ -97,8 +98,7 @@ static int map_hdm_decoder_regs(struct cxl_port *port, void __iomem *crb, return -ENODEV; } - return cxl_map_component_regs(&port->dev, regs, &map, - BIT(CXL_CM_CAP_CAP_ID_HDM)); + return cxl_map_component_regs(&map, regs, BIT(CXL_CM_CAP_CAP_ID_HDM)); } static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) |