summaryrefslogtreecommitdiff
path: root/drivers/cxl/cxl.h
diff options
context:
space:
mode:
authorDan Williams <dan.j.williams@intel.com>2022-12-05 23:32:11 +0300
committerDan Williams <dan.j.williams@intel.com>2022-12-05 23:32:11 +0300
commit02fedf1466567424c336cd11cf368dcf78f2af33 (patch)
tree713216a735619af0852b7bdf725271cc0ef8a5b2 /drivers/cxl/cxl.h
parente0f6fa0d425f745a887e640be66e22b45451e169 (diff)
parent7a7e6edfca857f490e3a963198c67620de26b7f0 (diff)
downloadlinux-02fedf1466567424c336cd11cf368dcf78f2af33.tar.xz
Merge branch 'for-6.2/cxl-xor' into for-6.2/cxl
Pick up support for "XOR" interleave math when parsing ACPI CFMWS window structures. Fix up conflicts with the RCH emulation already pending in cxl/next.
Diffstat (limited to 'drivers/cxl/cxl.h')
-rw-r--r--drivers/cxl/cxl.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 89847abb7e14..ed2b0a2e80e2 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -353,18 +353,23 @@ struct cxl_switch_decoder {
struct cxl_dport *target[];
};
+struct cxl_root_decoder;
+typedef struct cxl_dport *(*cxl_calc_hb_fn)(struct cxl_root_decoder *cxlrd,
+ int pos);
/**
* struct cxl_root_decoder - Static platform CXL address decoder
* @res: host / parent resource for region allocations
* @region_id: region id for next region provisioning event
* @calc_hb: which host bridge covers the n'th position by granularity
+ * @platform_data: platform specific configuration data
* @cxlsd: base cxl switch decoder
*/
struct cxl_root_decoder {
struct resource *res;
atomic_t region_id;
- struct cxl_dport *(*calc_hb)(struct cxl_root_decoder *cxlrd, int pos);
+ cxl_calc_hb_fn calc_hb;
+ void *platform_data;
struct cxl_switch_decoder cxlsd;
};
@@ -613,7 +618,9 @@ struct cxl_endpoint_decoder *to_cxl_endpoint_decoder(struct device *dev);
bool is_root_decoder(struct device *dev);
bool is_endpoint_decoder(struct device *dev);
struct cxl_root_decoder *cxl_root_decoder_alloc(struct cxl_port *port,
- unsigned int nr_targets);
+ unsigned int nr_targets,
+ cxl_calc_hb_fn calc_hb);
+struct cxl_dport *cxl_hb_modulo(struct cxl_root_decoder *cxlrd, int pos);
struct cxl_switch_decoder *cxl_switch_decoder_alloc(struct cxl_port *port,
unsigned int nr_targets);
int cxl_decoder_add(struct cxl_decoder *cxld, int *target_map);