diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2023-10-31 20:59:00 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-10-31 20:59:00 +0300 |
| commit | 7f946e6d830fbdf411cd0641314edf11831efc88 (patch) | |
| tree | 4e3cfe2157e52e0d5aba6c548cd643f297a393c7 /drivers/cxl/cxlmem.h | |
| parent | 8f61d48c83f6e3525a770e44692604595693f787 (diff) | |
| parent | e8db0701605bccbeb8d7907ecd2e50f346a725bd (diff) | |
| download | linux-7f946e6d830fbdf411cd0641314edf11831efc88.tar.xz | |
Merge branch 'for-6.7/cxl-rch-eh' into cxl/next
Restricted CXL Host (RCH) Error Handling undoes the topology munging of
CXL 1.1 to enabled some AER recovery, and lands some base infrastructure
for handling Root-Complex-Event-Collectors (RCECs) with CXL. Include
this long running series finally for v6.7.
Diffstat (limited to 'drivers/cxl/cxlmem.h')
| -rw-r--r-- | drivers/cxl/cxlmem.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 6933bc20e76b..a2fcbca253f3 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -400,6 +400,7 @@ enum cxl_devtype { * * @dev: The device associated with this CXL state * @cxlmd: The device representing the CXL.mem capabilities of @dev + * @reg_map: component and ras register mapping parameters * @regs: Parsed register blocks * @cxl_dvsec: Offset to the PCIe device DVSEC * @rcd: operating in RCD mode (CXL 3.0 9.11.8 CXL Devices Attached to an RCH) @@ -407,13 +408,13 @@ enum cxl_devtype { * @dpa_res: Overall DPA resource tree for the device * @pmem_res: Active Persistent memory capacity configuration * @ram_res: Active Volatile memory capacity configuration - * @component_reg_phys: register base of component registers * @serial: PCIe Device Serial Number * @type: Generic Memory Class device or Vendor Specific Memory device */ struct cxl_dev_state { struct device *dev; struct cxl_memdev *cxlmd; + struct cxl_register_map reg_map; struct cxl_regs regs; int cxl_dvsec; bool rcd; @@ -421,7 +422,6 @@ struct cxl_dev_state { struct resource dpa_res; struct resource pmem_res; struct resource ram_res; - resource_size_t component_reg_phys; u64 serial; enum cxl_devtype type; }; |