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| author | Dan Williams <dan.j.williams@intel.com> | 2023-06-26 04:56:13 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-06-26 04:56:13 +0300 |
| commit | 0c0df63177e37ae826d803280eb2c5b6b6a7a9a4 (patch) | |
| tree | 5b158934251cb6537491371d3dd09fcf349a3102 /drivers/cxl/port.c | |
| parent | d2f9fe695313b1e50028c1ec4cd09bea67152a60 (diff) | |
| parent | 5d2ffbe4b81a3b6353bf888a523e7e5d4fec47ad (diff) | |
| download | linux-0c0df63177e37ae826d803280eb2c5b6b6a7a9a4.tar.xz | |
Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl
Pick up the first half of the RCH error handling series. The back half
needs some fixups for test regressions. Small conflicts with the PMU
work around register enumeration and setup helpers.
Diffstat (limited to 'drivers/cxl/port.c')
| -rw-r--r-- | drivers/cxl/port.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c index 07c5ac598da1..6240e05b9542 100644 --- a/drivers/cxl/port.c +++ b/drivers/cxl/port.c @@ -87,7 +87,7 @@ static int cxl_switch_port_probe(struct cxl_port *port) static int cxl_endpoint_port_probe(struct cxl_port *port) { struct cxl_endpoint_dvsec_info info = { .port = port }; - struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport); + struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev); struct cxl_dev_state *cxlds = cxlmd->cxlds; struct cxl_hdm *cxlhdm; struct cxl_port *root; @@ -98,8 +98,11 @@ static int cxl_endpoint_port_probe(struct cxl_port *port) return rc; cxlhdm = devm_cxl_setup_hdm(port, &info); - if (IS_ERR(cxlhdm)) + if (IS_ERR(cxlhdm)) { + if (PTR_ERR(cxlhdm) == -ENODEV) + dev_err(&port->dev, "HDM decoder registers not found\n"); return PTR_ERR(cxlhdm); + } /* Cache the data early to ensure is_visible() works */ read_cdat_data(port); |