diff options
author | Frank Li <Frank.Li@nxp.com> | 2023-08-21 19:16:15 +0300 |
---|---|---|
committer | Vinod Koul <vkoul@kernel.org> | 2023-08-22 17:41:03 +0300 |
commit | 7536f8b371adcc1c4f7ed7ca579da24bdeb14b6f (patch) | |
tree | a6d96de1ffccaf1f85a16aab35ab86d30baca125 /drivers/dma/fsl-edma-common.c | |
parent | 9b05554c5ca6829a60c610191d45f244d8726e95 (diff) | |
download | linux-7536f8b371adcc1c4f7ed7ca579da24bdeb14b6f.tar.xz |
dmaengine: fsl-edma: move tcd into struct fsl_dma_chan
Relocates the tcd into the fsl_dma_chan structure. This adjustment reduces
the need to reference back to fsl_edma_engine, paving the way for EDMA V3
support.
Unified the edma_writel and edma_writew functions for accessing TCD
(Transfer Control Descriptor) registers. A new macro is added that can
automatically detect whether a 32-bit or 16-bit access should be used
based on the structure field definition. This provide better support
64-bit TCD with future v5 version.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202305271951.gmRobs3a-lkp@intel.com/
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20230821161617.2142561-11-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/fsl-edma-common.c')
-rw-r--r-- | drivers/dma/fsl-edma-common.c | 38 |
1 files changed, 14 insertions, 24 deletions
diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index e0f914616c5f..13c328728025 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -40,8 +40,6 @@ #define EDMA64_ERRH 0x28 #define EDMA64_ERRL 0x2c -#define EDMA_TCD 0x1000 - void fsl_edma_tx_chan_handler(struct fsl_edma_chan *fsl_chan) { spin_lock(&fsl_chan->vchan.lock); @@ -285,8 +283,6 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, struct virt_dma_desc *vdesc, bool in_progress) { struct fsl_edma_desc *edesc = fsl_chan->edesc; - struct edma_regs *regs = &fsl_chan->edma->regs; - u32 ch = fsl_chan->vchan.chan.chan_id; enum dma_transfer_direction dir = edesc->dirn; dma_addr_t cur_addr, dma_addr; size_t len, size; @@ -301,9 +297,9 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, return len; if (dir == DMA_MEM_TO_DEV) - cur_addr = edma_readl(fsl_chan->edma, ®s->tcd[ch].saddr); + cur_addr = edma_read_tcdreg(fsl_chan, saddr); else - cur_addr = edma_readl(fsl_chan->edma, ®s->tcd[ch].daddr); + cur_addr = edma_read_tcdreg(fsl_chan, daddr); /* figure out the finished and calculate the residue */ for (i = 0; i < fsl_chan->edesc->n_tcds; i++) { @@ -358,9 +354,6 @@ enum dma_status fsl_edma_tx_status(struct dma_chan *chan, static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, struct fsl_edma_hw_tcd *tcd) { - struct fsl_edma_engine *edma = fsl_chan->edma; - struct edma_regs *regs = &fsl_chan->edma->regs; - u32 ch = fsl_chan->vchan.chan.chan_id; u16 csr = 0; /* @@ -369,23 +362,22 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, * big- or little-endian obeying the eDMA engine model endian, * and this is performed from specific edma_write functions */ - edma_writew(edma, 0, ®s->tcd[ch].csr); + edma_write_tcdreg(fsl_chan, 0, csr); - edma_writel(edma, (s32)tcd->saddr, ®s->tcd[ch].saddr); - edma_writel(edma, (s32)tcd->daddr, ®s->tcd[ch].daddr); + edma_write_tcdreg(fsl_chan, tcd->saddr, saddr); + edma_write_tcdreg(fsl_chan, tcd->daddr, daddr); - edma_writew(edma, (s16)tcd->attr, ®s->tcd[ch].attr); - edma_writew(edma, tcd->soff, ®s->tcd[ch].soff); + edma_write_tcdreg(fsl_chan, tcd->attr, attr); + edma_write_tcdreg(fsl_chan, tcd->soff, soff); - edma_writel(edma, (s32)tcd->nbytes, ®s->tcd[ch].nbytes); - edma_writel(edma, (s32)tcd->slast, ®s->tcd[ch].slast); + edma_write_tcdreg(fsl_chan, tcd->nbytes, nbytes); + edma_write_tcdreg(fsl_chan, tcd->slast, slast); - edma_writew(edma, (s16)tcd->citer, ®s->tcd[ch].citer); - edma_writew(edma, (s16)tcd->biter, ®s->tcd[ch].biter); - edma_writew(edma, (s16)tcd->doff, ®s->tcd[ch].doff); + edma_write_tcdreg(fsl_chan, tcd->citer, citer); + edma_write_tcdreg(fsl_chan, tcd->biter, biter); + edma_write_tcdreg(fsl_chan, tcd->doff, doff); - edma_writel(edma, (s32)tcd->dlast_sga, - ®s->tcd[ch].dlast_sga); + edma_write_tcdreg(fsl_chan, tcd->dlast_sga, dlast_sga); if (fsl_chan->is_sw) { csr = le16_to_cpu(tcd->csr); @@ -393,7 +385,7 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, tcd->csr = cpu_to_le16(csr); } - edma_writew(edma, (s16)tcd->csr, ®s->tcd[ch].csr); + edma_write_tcdreg(fsl_chan, tcd->csr, csr); } static inline @@ -736,8 +728,6 @@ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) edma->regs.errh = edma->membase + EDMA64_ERRH; edma->regs.inth = edma->membase + EDMA64_INTH; } - - edma->regs.tcd = edma->membase + EDMA_TCD; } MODULE_LICENSE("GPL v2"); |