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| author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2013-07-10 14:09:47 +0400 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2013-08-27 12:54:07 +0400 |
| commit | ca8b387803072a16baf6d8090591b10bfdf4e253 (patch) | |
| tree | 369a7e9cc93d4ff6d7e9445d57ef933a107eb75f /drivers/dma/sh/shdma-base.c | |
| parent | 115357e9774ff8d70a84d3c31f271209913637b0 (diff) | |
| download | linux-ca8b387803072a16baf6d8090591b10bfdf4e253.tar.xz | |
DMA: shdma: support the new CHCLR register layout
On newer r-car SoCs the CHCLR register only contains one bit per channel,
to which a 1 has to be written to reset the channel. Older SoC versions had
one CHCLR register per channel, to which a 0 must be written to reset the
channel and clear its buffers. This patch adds support for the newer
layout.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/sh/shdma-base.c')
0 files changed, 0 insertions, 0 deletions