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authorQiuxu Zhuo <qiuxu.zhuo@intel.com>2020-11-05 10:49:14 +0300
committerTony Luck <tony.luck@intel.com>2020-11-19 23:51:17 +0300
commit10590a9d4f23e0a519730d79d39331df60ad2079 (patch)
treea830b625885644bf1b0ad9b031cd1b0a63a6f0ab /drivers/edac/Kconfig
parent3b20369313a486246582c8ef6ff5d1d0b9c34613 (diff)
downloadlinux-10590a9d4f23e0a519730d79d39331df60ad2079.tar.xz
EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC
This driver supports Intel client SoC with integrated memory controller using In-Band ECC(IBECC). The memory correctable and uncorrectable errors are reported via NMIs. The driver handles the NMIs and decodes the memory error address to platform specific address. The first IBECC-supported SoC is Elkhart Lake. [Tony: s/#include <linux/nmi.h>/#include <asm/nmi.h>/ to fix randconfig build] Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'drivers/edac/Kconfig')
-rw-r--r--drivers/edac/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 7a47680d6f07..fa0c3b5797e4 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -269,6 +269,15 @@ config EDAC_PND2
first used on the Apollo Lake platform and Denverton
micro-server but may appear on others in the future.
+config EDAC_IGEN6
+ tristate "Intel client SoC Integrated MC"
+ depends on PCI && X86_64 && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
+ help
+ Support for error detection and correction on the Intel
+ client SoC Integrated Memory Controller using In-Band ECC IP.
+ This In-Band ECC is first used on the Elkhart Lake SoC but
+ may appear on others in the future.
+
config EDAC_MPC85XX
bool "Freescale MPC83xx / MPC85xx"
depends on FSL_SOC && EDAC=y