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authorBorislav Petkov <borislav.petkov@amd.com>2011-01-07 18:17:46 +0300
committerBorislav Petkov <borislav.petkov@amd.com>2011-03-17 16:46:17 +0300
commitbcd781f46a5f892ef2ae5843839849aa579fe096 (patch)
tree7498d7d5096a61042d9f72444001f8b31e765b25 /drivers/edac/mce_amd.h
parenta97fa68ec403e2761a37b28651de8fd9da8c5e1f (diff)
downloadlinux-bcd781f46a5f892ef2ae5843839849aa579fe096.tar.xz
amd64_edac: Cleanup NBSH cruft
Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/mce_amd.h')
-rw-r--r--drivers/edac/mce_amd.h18
1 files changed, 5 insertions, 13 deletions
diff --git a/drivers/edac/mce_amd.h b/drivers/edac/mce_amd.h
index 45dda47173f2..70a0bb2c13c5 100644
--- a/drivers/edac/mce_amd.h
+++ b/drivers/edac/mce_amd.h
@@ -31,19 +31,11 @@
#define R4(x) (((x) >> 4) & 0xf)
#define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
-#define K8_NBSH 0x4C
-
-#define K8_NBSH_VALID_BIT BIT(31)
-#define K8_NBSH_OVERFLOW BIT(30)
-#define K8_NBSH_UC_ERR BIT(29)
-#define K8_NBSH_ERR_EN BIT(28)
-#define K8_NBSH_MISCV BIT(27)
-#define K8_NBSH_VALID_ERROR_ADDR BIT(26)
-#define K8_NBSH_PCC BIT(25)
-#define K8_NBSH_ERR_CPU_VAL BIT(24)
-#define K8_NBSH_CECC BIT(14)
-#define K8_NBSH_UECC BIT(13)
-#define K8_NBSH_ERR_SCRUBER BIT(8)
+/*
+ * F3x4C bits (MCi_STATUS' high half)
+ */
+#define NBSH_VALID_ERROR_ADDR BIT(26)
+#define NBSH_ERR_CPU_VAL BIT(24)
enum tt_ids {
TT_INSTR = 0,