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| author | Qiuxu Zhuo <qiuxu.zhuo@intel.com> | 2022-07-23 02:33:35 +0300 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2022-09-23 22:33:08 +0300 |
| commit | 14646de48bd77947cd6a325b42eecddcec5a35c7 (patch) | |
| tree | 812ee796f19b4586c4a457f9f7ea25ce181868ac /drivers/edac/skx_common.h | |
| parent | d5e4eeea0c20b7467458cf3f3d887f59075db93e (diff) | |
| download | linux-14646de48bd77947cd6a325b42eecddcec5a35c7.tar.xz | |
EDAC/skx_common: Add ChipSelect ADXL component
Each pseudo channel of HBM has its own retry_rd_err_log registers.
The bit 0 of ChipSelect ADXL component encodes the pseudo channel
number of HBM memory. So add ChipSelect ADXL component to get HBM
pseudo channel number.
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
Diffstat (limited to 'drivers/edac/skx_common.h')
| -rw-r--r-- | drivers/edac/skx_common.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h index c542f1562825..167760fd75ba 100644 --- a/drivers/edac/skx_common.h +++ b/drivers/edac/skx_common.h @@ -112,16 +112,19 @@ enum { INDEX_MEMCTRL, INDEX_CHANNEL, INDEX_DIMM, + INDEX_CS, INDEX_NM_FIRST, INDEX_NM_MEMCTRL = INDEX_NM_FIRST, INDEX_NM_CHANNEL, INDEX_NM_DIMM, + INDEX_NM_CS, INDEX_MAX }; #define BIT_NM_MEMCTRL BIT_ULL(INDEX_NM_MEMCTRL) #define BIT_NM_CHANNEL BIT_ULL(INDEX_NM_CHANNEL) #define BIT_NM_DIMM BIT_ULL(INDEX_NM_DIMM) +#define BIT_NM_CS BIT_ULL(INDEX_NM_CS) struct decoded_addr { struct mce *mce; @@ -134,6 +137,7 @@ struct decoded_addr { int sktways; int chanways; int dimm; + int cs; int rank; int channel_rank; u64 rank_address; |