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authorQiuxu Zhuo <qiuxu.zhuo@intel.com>2023-01-13 06:28:01 +0300
committerTony Luck <tony.luck@intel.com>2023-01-25 19:17:20 +0300
commitdd7814b78539416c6e561eeaa0951b3e88ac799e (patch)
tree9aefcf6f4c0b58fa1b99fe0d38f1eb55d00ac297 /drivers/edac/skx_common.h
parente4b2bc6616e21f4a7ce4e7452f716e3db8fe66b6 (diff)
downloadlinux-dd7814b78539416c6e561eeaa0951b3e88ac799e.tar.xz
EDAC/i10nm: Make more configurations CPU model specific
The numbers of memory controllers per socket, channels per memory controller, DIMMs per channel and the triples of bus/device/function of PCI devices used in i10nm_edac can be CPU model specific. Add new fields to the structure res_config for above numbers and triples to make them CPU model specific. Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/all/20230113032802.41752-1-qiuxu.zhuo@intel.com
Diffstat (limited to 'drivers/edac/skx_common.h')
-rw-r--r--drivers/edac/skx_common.h32
1 files changed, 30 insertions, 2 deletions
diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h
index 312032657264..982e1bcb1edf 100644
--- a/drivers/edac/skx_common.h
+++ b/drivers/edac/skx_common.h
@@ -173,19 +173,47 @@ struct decoded_addr {
bool decoded_by_adxl;
};
+struct pci_bdf {
+ u32 bus : 8;
+ u32 dev : 5;
+ u32 fun : 3;
+};
+
struct res_config {
enum type type;
/* Configuration agent device ID */
unsigned int decs_did;
/* Default bus number configuration register offset */
int busno_cfg_offset;
+ /* DDR memory controllers per socket */
+ int ddr_imc_num;
+ /* DDR channels per DDR memory controller */
+ int ddr_chan_num;
+ /* DDR DIMMs per DDR memory channel */
+ int ddr_dimm_num;
/* Per DDR channel memory-mapped I/O size */
int ddr_chan_mmio_sz;
+ /* HBM memory controllers per socket */
+ int hbm_imc_num;
+ /* HBM channels per HBM memory controller */
+ int hbm_chan_num;
+ /* HBM DIMMs per HBM memory channel */
+ int hbm_dimm_num;
/* Per HBM channel memory-mapped I/O size */
int hbm_chan_mmio_sz;
bool support_ddr5;
- /* SAD device number and function number */
- unsigned int sad_all_devfn;
+ /* SAD device BDF */
+ struct pci_bdf sad_all_bdf;
+ /* PCU device BDF */
+ struct pci_bdf pcu_cr3_bdf;
+ /* UTIL device BDF */
+ struct pci_bdf util_all_bdf;
+ /* URACU device BDF */
+ struct pci_bdf uracu_bdf;
+ /* DDR mdev device BDF */
+ struct pci_bdf ddr_mdev_bdf;
+ /* HBM mdev device BDF */
+ struct pci_bdf hbm_mdev_bdf;
int sad_all_offset;
/* Offsets of retry_rd_err_log registers */
u32 *offsets_scrub;