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authorThor Thayer <tthayer@opensource.altera.com>2016-03-21 19:01:38 +0300
committerBorislav Petkov <bp@suse.de>2016-03-29 11:06:11 +0300
commit3a8f21f170dc7c85f9c0fc5cc49a2fd31bd00628 (patch)
tree2e78fad33ec73f804f7828aaee91676fc0847cec /drivers/edac
parentf55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff)
downloadlinux-3a8f21f170dc7c85f9c0fc5cc49a2fd31bd00628.tar.xz
EDAC, altera: Make L2C depend on L2x0 cache controller
Make L2 cache depend instead of forcibly select the L2 cache support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1458576106-24505-2-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/Kconfig5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 37755e63cc28..6ca7474baf4a 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -378,12 +378,11 @@ config EDAC_ALTERA
config EDAC_ALTERA_L2C
bool "Altera L2 Cache ECC"
- depends on EDAC_ALTERA=y
- select CACHE_L2X0
+ depends on EDAC_ALTERA=y && CACHE_L2X0
help
Support for error detection and correction on the
Altera L2 cache Memory for Altera SoCs. This option
- requires L2 cache so it will force that selection.
+ requires L2 cache.
config EDAC_ALTERA_OCRAM
bool "Altera On-Chip RAM ECC"