diff options
| author | Stephan Gerhold <stephan@gerhold.net> | 2021-12-01 16:05:05 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-02-04 06:54:48 +0300 |
| commit | f60a317bcbea5c5b8923d6de6c7288850fdd83fb (patch) | |
| tree | 2746988a861750cdc64f4cb7e526eb4b4316a44c /drivers/firmware/qcom_scm.h | |
| parent | 52beb1fc237d67cdc64277dc90047767a6fc52d7 (diff) | |
| download | linux-f60a317bcbea5c5b8923d6de6c7288850fdd83fb.tar.xz | |
firmware: qcom: scm: Add support for MC boot address API
It looks like the old QCOM_SCM_BOOT_SET_ADDR API is broken on some
MSM8916 firmware versions that implement the newer SMC32 calling
convention. It just returns -EINVAL no matter which arguments are
being passed.
This does not cause any problems downstream because it first tries
to use the new multi-cluster API replacement which is working fine.
Implement support for the multi-cluster variant of the SCM call
by attempting it first but still fallback to the old call in case
of an error. Also, to be absolutely sure only use the multi-cluster
variant with the SMC calling convention since older platforms should
not need this.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201130505.257379-5-stephan@gerhold.net
Diffstat (limited to 'drivers/firmware/qcom_scm.h')
| -rw-r--r-- | drivers/firmware/qcom_scm.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 122b7baa3e2d..0d51eef2472f 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -78,9 +78,13 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, #define QCOM_SCM_BOOT_SET_ADDR 0x01 #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 #define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10 +#define QCOM_SCM_BOOT_SET_ADDR_MC 0x11 #define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a #define QCOM_SCM_FLUSH_FLAG_MASK 0x3 #define QCOM_SCM_BOOT_MAX_CPUS 4 +#define QCOM_SCM_BOOT_MC_FLAG_AARCH64 BIT(0) +#define QCOM_SCM_BOOT_MC_FLAG_COLDBOOT BIT(1) +#define QCOM_SCM_BOOT_MC_FLAG_WARMBOOT BIT(2) #define QCOM_SCM_SVC_PIL 0x02 #define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01 |