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authorGernot Vormayr <gvormayr@gmail.com>2014-09-24 02:58:45 +0400
committerLinus Walleij <linus.walleij@linaro.org>2014-09-24 15:37:38 +0400
commit1b4c5a6e6b73b082170bfcbf1ff3e2fcf2e7530c (patch)
tree8d691c89257a7fe3b2bf773b47ebb13e0e1cc9cd /drivers/gpio
parent58a3b92d33d289e2f3390b40a2c5cfd7f32cfe7a (diff)
downloadlinux-1b4c5a6e6b73b082170bfcbf1ff3e2fcf2e7530c.tar.xz
gpio: Fix ngpio in gpio-xilinx driver
If one adds gpio-controller; to the chip in the devicetree, then initialization fails with 'gpiochip_find_base: cannot find free range', because ngpio is 0. This patch fixes the bug. This version includes the suggestions from Linus Walleij. Tested on ml507 board. Signed-off-by: Gernot Vormayr <gvormayr@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-xilinx.c27
1 files changed, 15 insertions, 12 deletions
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index 12481867daf1..ba18b06c9a21 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -197,6 +197,7 @@ static int xgpio_of_probe(struct device_node *np)
struct xgpio_instance *chip;
int status = 0;
const u32 *tree_info;
+ u32 ngpio;
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
if (!chip)
@@ -211,12 +212,13 @@ static int xgpio_of_probe(struct device_node *np)
/* Update GPIO direction shadow register with default value */
of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
- /* By default assume full GPIO controller */
- chip->mmchip.gc.ngpio = 32;
-
- /* Check device node and parent device node for device width */
- of_property_read_u32(np, "xlnx,gpio-width",
- (u32 *)&chip->mmchip.gc.ngpio);
+ /*
+ * Check device node and parent device node for device width
+ * and assume default width of 32
+ */
+ if (of_property_read_u32(np, "xlnx,gpio-width", &ngpio))
+ ngpio = 32;
+ chip->mmchip.gc.ngpio = (u16)ngpio;
spin_lock_init(&chip->gpio_lock);
@@ -258,12 +260,13 @@ static int xgpio_of_probe(struct device_node *np)
/* Update GPIO direction shadow register with default value */
of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);
- /* By default assume full GPIO controller */
- chip->mmchip.gc.ngpio = 32;
-
- /* Check device node and parent device node for device width */
- of_property_read_u32(np, "xlnx,gpio2-width",
- (u32 *)&chip->mmchip.gc.ngpio);
+ /*
+ * Check device node and parent device node for device width
+ * and assume default width of 32
+ */
+ if (of_property_read_u32(np, "xlnx,gpio2-width", &ngpio))
+ ngpio = 32;
+ chip->mmchip.gc.ngpio = (u16)ngpio;
spin_lock_init(&chip->gpio_lock);