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authorLinus Walleij <linus.walleij@linaro.org>2019-02-19 23:32:02 +0300
committerLinus Walleij <linus.walleij@linaro.org>2019-02-19 23:48:20 +0300
commit11da905412833d9b369a6a09a401f87149d674dc (patch)
tree5c7495136333f30486194050e6afd983e271c570 /drivers/gpio
parent0e7d6f94016407fd7e1ae472e254d64d4454e9c8 (diff)
downloadlinux-11da905412833d9b369a6a09a401f87149d674dc.tar.xz
gpio: tegra: Fix offset of pinctrl calls
This patch hunk is a lightly modified version of a diff found in a Tegra code dump from a product tree. It makes a lot of sense because this is what most drivers do. Cc: Thierry Reding <treding@nvidia.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Dmitry Osipenko <digetx@gmail.com> Cc: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-tegra.c25
1 files changed, 21 insertions, 4 deletions
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 02f6db925fd5..1ececf2c3282 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -2,6 +2,7 @@
* arch/arm/mach-tegra/gpio.c
*
* Copyright (c) 2010 Google, Inc
+ * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved.
*
* Author:
* Erik Gilling <konkers@google.com>
@@ -141,14 +142,14 @@ static void tegra_gpio_disable(struct tegra_gpio_info *tgi, unsigned int gpio)
static int tegra_gpio_request(struct gpio_chip *chip, unsigned int offset)
{
- return pinctrl_gpio_request(offset);
+ return pinctrl_gpio_request(chip->base + offset);
}
static void tegra_gpio_free(struct gpio_chip *chip, unsigned int offset)
{
struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
- pinctrl_gpio_free(offset);
+ pinctrl_gpio_free(chip->base + offset);
tegra_gpio_disable(tgi, offset);
}
@@ -176,10 +177,18 @@ static int tegra_gpio_direction_input(struct gpio_chip *chip,
unsigned int offset)
{
struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
+ int ret;
tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 0);
tegra_gpio_enable(tgi, offset);
- return 0;
+
+ ret = pinctrl_gpio_direction_input(chip->base + offset);
+ if (ret < 0)
+ dev_err(tgi->dev,
+ "Failed to set pinctrl input direction of GPIO %d: %d",
+ chip->base + offset, ret);
+
+ return ret;
}
static int tegra_gpio_direction_output(struct gpio_chip *chip,
@@ -187,11 +196,19 @@ static int tegra_gpio_direction_output(struct gpio_chip *chip,
int value)
{
struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
+ int ret;
tegra_gpio_set(chip, offset, value);
tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 1);
tegra_gpio_enable(tgi, offset);
- return 0;
+
+ ret = pinctrl_gpio_direction_output(chip->base + offset);
+ if (ret < 0)
+ dev_err(tgi->dev,
+ "Failed to set pinctrl output direction of GPIO %d: %d",
+ chip->base + offset, ret);
+
+ return ret;
}
static int tegra_gpio_get_direction(struct gpio_chip *chip,