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authorWilliam Breathitt Gray <vilhelm.gray@gmail.com>2017-01-19 18:05:59 +0300
committerLinus Walleij <linus.walleij@linaro.org>2017-01-26 12:57:39 +0300
commit99c8ac957e6b7c670b78ad7b8667051de8624d37 (patch)
treefd7a7739fb9dbeadcb5a10ea7b635e810db4a6b9 /drivers/gpio
parent65502a12adc343037e8a1e6e936dd8c01f4117b2 (diff)
downloadlinux-99c8ac957e6b7c670b78ad7b8667051de8624d37.tar.xz
gpio: ws16c48: Add set_multiple callback function support
The WinSystems WS16C48 provides registers where 8 lines of GPIO may be set at a time. This patch add support for the set_multiple callback function, thus allowing multiple GPIO output lines to be set more efficiently in groups. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-ws16c48.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c
index eaa71d440ccf..25e539530c08 100644
--- a/drivers/gpio/gpio-ws16c48.c
+++ b/drivers/gpio/gpio-ws16c48.c
@@ -155,6 +155,46 @@ static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
}
+static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
+ unsigned long *mask, unsigned long *bits)
+{
+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
+ unsigned int i;
+ const unsigned int gpio_reg_size = 8;
+ unsigned int port;
+ unsigned int iomask;
+ unsigned int bitmask;
+ unsigned long flags;
+
+ /* set bits are evaluated a gpio register size at a time */
+ for (i = 0; i < chip->ngpio; i += gpio_reg_size) {
+ /* no more set bits in this mask word; skip to the next word */
+ if (!mask[BIT_WORD(i)]) {
+ i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;
+ continue;
+ }
+
+ port = i / gpio_reg_size;
+
+ /* mask out GPIO configured for input */
+ iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port];
+ bitmask = iomask & bits[BIT_WORD(i)];
+
+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
+
+ /* update output state data and set device gpio register */
+ ws16c48gpio->out_state[port] &= ~iomask;
+ ws16c48gpio->out_state[port] |= bitmask;
+ outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
+
+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
+
+ /* prepare for next gpio register set */
+ mask[BIT_WORD(i)] >>= gpio_reg_size;
+ bits[BIT_WORD(i)] >>= gpio_reg_size;
+ }
+}
+
static void ws16c48_irq_ack(struct irq_data *data)
{
struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
@@ -329,6 +369,7 @@ static int ws16c48_probe(struct device *dev, unsigned int id)
ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output;
ws16c48gpio->chip.get = ws16c48_gpio_get;
ws16c48gpio->chip.set = ws16c48_gpio_set;
+ ws16c48gpio->chip.set_multiple = ws16c48_gpio_set_multiple;
ws16c48gpio->base = base[id];
ws16c48gpio->irq = irq[id];