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| author | Jack Xiao <Jack.Xiao@amd.com> | 2022-06-16 16:34:24 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-06-30 22:28:24 +0300 |
| commit | cf6067290034b9ebbe4c39733b1a4acc94876c26 (patch) | |
| tree | 332a8a36d455d4755ca6ecd94b4b7e1840eca3a3 /drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | |
| parent | adc0e6ab0df390907228abb76c6bf82382089af1 (diff) | |
| download | linux-cf6067290034b9ebbe4c39733b1a4acc94876c26.tar.xz | |
drm/amdgpu: enable mes to access registers v2
Enable mes to access registers.
v2: squash mes sched ring enablement flag
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c index e098b69d6321..d4e9c6790c2c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c @@ -274,7 +274,7 @@ static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, /* For SRIOV run time, driver shouldn't access the register through MMIO * Directly use kiq to do the vm invalidation instead */ - if (adev->gfx.kiq.ring.sched.ready && !adev->enable_mes && + if ((adev->gfx.kiq.ring.sched.ready || adev->mes.ring.sched.ready) && (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) { struct amdgpu_vmhub *hub = &adev->vmhub[vmhub]; const unsigned eng = 17; |