diff options
author | Jiansong Chen <Jiansong.Chen@amd.com> | 2020-04-15 13:38:05 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-15 19:46:47 +0300 |
commit | c82b38ec2ea9d377c401cb4bc1949cc771479901 (patch) | |
tree | 366482a71f3f95fc6d60d252c802926c74dfcde0 /drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | |
parent | f4497d1029a5275647fdd97b77cea8dae1116f75 (diff) | |
download | linux-c82b38ec2ea9d377c401cb4bc1949cc771479901.tar.xz |
drm/amdgpu: add psp support for navy_flounder
Currently skip ASD FW loading and ih reroute per
sienna_cichlid.
Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/psp_v11_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c index 423386272920..77f99811cd85 100644 --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c @@ -57,6 +57,8 @@ MODULE_FIRMWARE("amdgpu/arcturus_asd.bin"); MODULE_FIRMWARE("amdgpu/arcturus_ta.bin"); MODULE_FIRMWARE("amdgpu/sienna_cichlid_sos.bin"); MODULE_FIRMWARE("amdgpu/sienna_cichlid_asd.bin"); +MODULE_FIRMWARE("amdgpu/navy_flounder_sos.bin"); +MODULE_FIRMWARE("amdgpu/navy_flounder_asd.bin"); /* address block */ #define smnMP1_FIRMWARE_FLAGS 0x3010024 @@ -100,6 +102,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) case CHIP_SIENNA_CICHLID: chip_name = "sienna_cichlid"; break; + case CHIP_NAVY_FLOUNDER: + chip_name = "navy_flounder"; + break; default: BUG(); } @@ -108,7 +113,8 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) if (err) return err; - if (adev->asic_type != CHIP_SIENNA_CICHLID) { + if (adev->asic_type != CHIP_SIENNA_CICHLID && + adev->asic_type != CHIP_NAVY_FLOUNDER) { err = psp_init_asd_microcode(psp, chip_name); if (err) return err; @@ -173,6 +179,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) } break; case CHIP_SIENNA_CICHLID: + case CHIP_NAVY_FLOUNDER: break; default: BUG(); @@ -397,7 +404,8 @@ static int psp_v11_0_ring_init(struct psp_context *psp, struct amdgpu_device *adev = psp->adev; if ((!amdgpu_sriov_vf(adev)) && - (adev->asic_type != CHIP_SIENNA_CICHLID)) + (adev->asic_type != CHIP_SIENNA_CICHLID) && + (adev->asic_type != CHIP_NAVY_FLOUNDER)) psp_v11_0_reroute_ih(psp); ring = &psp->km_ring; |