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authorLikun Gao <Likun.Gao@amd.com>2022-05-05 22:45:06 +0300
committerAlex Deucher <alexander.deucher@amd.com>2022-05-11 00:53:10 +0300
commitdfc53681de592d31a6de894c9b9afb14634ec6aa (patch)
tree78029c8e7a5760014bafc7b212dfcc5e84330842 /drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
parent8424f2ccb3c0dd43369288a47d15c980136c3bd5 (diff)
downloadlinux-dfc53681de592d31a6de894c9b9afb14634ec6aa.tar.xz
drm/amdgpu: add sysfs to shows psp vbflash status
Add new sysfs interface to shows the status of psp vbflash status. V2: rename the sysfs interface, and set more return value. (0: not start; 1: in progress; MBX115 value when vbflash finish) V3: warning fixes Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/psp_v13_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/psp_v13_0.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
index 894ac0c64bf6..d6d79e97def9 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
@@ -487,6 +487,9 @@ static int psp_v13_0_exec_spi_cmd(struct psp_context *psp, int cmd)
/* Ring the doorbell */
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_73, 1);
+ if (cmd == C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE)
+ return 0;
+
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_115),
MBOX_READY_FLAG, MBOX_READY_MASK, false);
if (ret) {
@@ -504,7 +507,8 @@ static int psp_v13_0_exec_spi_cmd(struct psp_context *psp, int cmd)
return 0;
}
-int psp_v13_0_update_spirom(struct psp_context *psp, uint64_t fw_pri_mc_addr)
+static int psp_v13_0_update_spirom(struct psp_context *psp,
+ uint64_t fw_pri_mc_addr)
{
struct amdgpu_device *adev = psp->adev;
int ret;
@@ -529,6 +533,8 @@ int psp_v13_0_update_spirom(struct psp_context *psp, uint64_t fw_pri_mc_addr)
if (ret)
return ret;
+ psp->vbflash_done = true;
+
ret = psp_v13_0_exec_spi_cmd(psp, C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE);
if (ret)
return ret;
@@ -536,6 +542,13 @@ int psp_v13_0_update_spirom(struct psp_context *psp, uint64_t fw_pri_mc_addr)
return 0;
}
+static int psp_v13_0_vbflash_status(struct psp_context *psp)
+{
+ struct amdgpu_device *adev = psp->adev;
+
+ return RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_115);
+}
+
static const struct psp_funcs psp_v13_0_funcs = {
.init_microcode = psp_v13_0_init_microcode,
.bootloader_load_kdb = psp_v13_0_bootloader_load_kdb,
@@ -553,7 +566,8 @@ static const struct psp_funcs psp_v13_0_funcs = {
.ring_set_wptr = psp_v13_0_ring_set_wptr,
.load_usbc_pd_fw = psp_v13_0_load_usbc_pd_fw,
.read_usbc_pd_fw = psp_v13_0_read_usbc_pd_fw,
- .update_spirom = psp_v13_0_update_spirom
+ .update_spirom = psp_v13_0_update_spirom,
+ .vbflash_stat = psp_v13_0_vbflash_status
};
void psp_v13_0_set_psp_funcs(struct psp_context *psp)