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| author | James Zhu <James.Zhu@amd.com> | 2019-06-04 19:49:02 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-11 19:57:38 +0300 |
| commit | 052af915d826b33588749566145c9417fcfc7246 (patch) | |
| tree | 116b6f3d115a999c73af93d45bf905acbd3c4450 /drivers/gpu/drm/amd/amdgpu/soc15.h | |
| parent | 59648d6954cd3539f9b7e599b14d8b0cdcf41279 (diff) | |
| download | linux-052af915d826b33588749566145c9417fcfc7246.tar.xz | |
drm/amdgpu: Fixed missing to clear some EDC count
EDC counts are related to instance and se. They are not the same
for different type of EDC. EDC clearing are changed to base on
individual EDC's instance and SE number.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h index 06f39f5bbf76..48e824d52ad9 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h @@ -48,6 +48,8 @@ struct soc15_reg_entry { uint32_t seg; uint32_t reg_offset; uint32_t reg_value; + uint32_t se_num; + uint32_t instance; }; #define SOC15_REG_ENTRY(ip, inst, reg) ip##_HWIP, inst, reg##_BASE_IDX, reg |