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authorchangzhu <Changfeng.Zhu@amd.com>2019-11-19 06:13:29 +0300
committerAlex Deucher <alexander.deucher@amd.com>2019-11-22 22:27:11 +0300
commit4ed8a03740d0ce092563c8fcb76d2c28da4675cd (patch)
tree1d2d399108285b933539fdd259b073ee28923c59 /drivers/gpu/drm/amd/amdgpu/soc15.h
parentdab5ef2722cde781ff3f6b3542d673ed174359b8 (diff)
downloadlinux-4ed8a03740d0ce092563c8fcb76d2c28da4675cd.tar.xz
drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10
It may lose gpuvm invalidate acknowldege state across power-gating off cycle. To avoid this issue in gmc9/gmc10 invalidation, add semaphore acquire before invalidation and semaphore release after invalidation. After adding semaphore acquire before invalidation, the semaphore register become read-only if another process try to acquire semaphore. Then it will not be able to release this semaphore. Then it may cause deadlock problem. If this deadlock problem happens, it needs a semaphore firmware fix. Signed-off-by: changzhu <Changfeng.Zhu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/soc15.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h
index 344280b869c4..d0fb7a67c1a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.h
@@ -28,8 +28,8 @@
#include "nbio_v7_0.h"
#include "nbio_v7_4.h"
-#define SOC15_FLUSH_GPU_TLB_NUM_WREG 4
-#define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT 1
+#define SOC15_FLUSH_GPU_TLB_NUM_WREG 6
+#define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT 3
extern const struct amd_ip_funcs soc15_common_ip_funcs;