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authorAlex Deucher <alexander.deucher@amd.com>2016-03-30 01:28:50 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-03-30 06:53:37 +0300
commitd766e6a393383c60a55bdcc72586f21a1ff12509 (patch)
tree2850bdf21e89a7bd48c8d08cd7ff6463ad955214 /drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
parent832be4041d4999e008839d12d1efe118da27bd99 (diff)
downloadlinux-d766e6a393383c60a55bdcc72586f21a1ff12509.tar.xz
drm/amdgpu: switch ih handling to two levels (v3)
Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 35008c181363..e448f7d86bc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -103,7 +103,7 @@ static int uvd_v5_0_sw_init(void *handle)
int r;
/* UVD TRAP */
- r = amdgpu_irq_add_id(adev, 124, &adev->uvd.irq);
+ r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 124, &adev->uvd.irq);
if (r)
return r;