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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2019-10-28 16:22:34 +0300
committerAlex Deucher <alexander.deucher@amd.com>2019-11-13 23:29:42 +0300
commit2200eb9e1819aabb9a1c24d5f6b132f389a2e8a9 (patch)
treeb05ea8bcef8f86a29b7b58ff933f8549ecb9b55b /drivers/gpu/drm/amd/display/dc/bios
parent9a71c7d31734f74549ad2bcd652c403c71e7c8d1 (diff)
downloadlinux-2200eb9e1819aabb9a1c24d5f6b132f389a2e8a9.tar.xz
drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards
[Why] Support for DMUB only depends on support for DC. It doesn't use floating point so we don't need to guard it by any specific DCN revision. [How] Drop the guards and cleanup the newlines around each one. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/bios')
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/command_table2.c27
1 files changed, 8 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
index a3d890050e39..1836f16bb7fe 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
@@ -37,10 +37,8 @@
#include "bios_parser_types_internal2.h"
#include "amdgpu.h"
-#ifdef CONFIG_DRM_AMD_DC_DMUB
#include "dc_dmub_srv.h"
#include "dc.h"
-#endif
#define DC_LOGGER \
bp->base.ctx->logger
@@ -107,7 +105,6 @@ static void init_dig_encoder_control(struct bios_parser *bp)
}
}
-#ifdef CONFIG_DRM_AMD_DC_DMUB
static void encoder_control_dmcub(
struct dc_dmub_srv *dmcub,
struct dig_encoder_stream_setup_parameters_v1_5 *dig)
@@ -121,7 +118,7 @@ static void encoder_control_dmcub(
dc_dmub_srv_cmd_execute(dmcub);
dc_dmub_srv_wait_idle(dmcub);
}
-#endif
+
static enum bp_result encoder_control_digx_v1_5(
struct bios_parser *bp,
struct bp_encoder_control *cntl)
@@ -173,13 +170,12 @@ static enum bp_result encoder_control_digx_v1_5(
default:
break;
}
-#ifdef CONFIG_DRM_AMD_DC_DMUB
+
if (bp->base.ctx->dc->ctx->dmub_srv &&
bp->base.ctx->dc->debug.dmub_command_table) {
encoder_control_dmcub(bp->base.ctx->dmub_srv, &params);
return BP_RESULT_OK;
}
-#endif
if (EXEC_BIOS_CMD_TABLE(digxencodercontrol, params))
result = BP_RESULT_OK;
@@ -216,7 +212,7 @@ static void init_transmitter_control(struct bios_parser *bp)
break;
}
}
-#ifdef CONFIG_DRM_AMD_DC_DMUB
+
static void transmitter_control_dmcub(
struct dc_dmub_srv *dmcub,
struct dig_transmitter_control_parameters_v1_6 *dig)
@@ -230,7 +226,7 @@ static void transmitter_control_dmcub(
dc_dmub_srv_cmd_execute(dmcub);
dc_dmub_srv_wait_idle(dmcub);
}
-#endif
+
static enum bp_result transmitter_control_v1_6(
struct bios_parser *bp,
struct bp_transmitter_control *cntl)
@@ -262,14 +258,11 @@ static enum bp_result transmitter_control_v1_6(
__func__, ps.param.symclk_10khz);
}
-
-#ifdef CONFIG_DRM_AMD_DC_DMUB
if (bp->base.ctx->dc->ctx->dmub_srv &&
bp->base.ctx->dc->debug.dmub_command_table) {
transmitter_control_dmcub(bp->base.ctx->dmub_srv, &ps.param);
return BP_RESULT_OK;
}
-#endif
/*color_depth not used any more, driver has deep color factor in the Phyclk*/
if (EXEC_BIOS_CMD_TABLE(dig1transmittercontrol, ps))
@@ -303,7 +296,6 @@ static void init_set_pixel_clock(struct bios_parser *bp)
}
}
-#ifdef CONFIG_DRM_AMD_DC_DMUB
static void set_pixel_clock_dmcub(
struct dc_dmub_srv *dmcub,
struct set_pixel_clock_parameter_v1_7 *clk)
@@ -317,7 +309,6 @@ static void set_pixel_clock_dmcub(
dc_dmub_srv_cmd_execute(dmcub);
dc_dmub_srv_wait_idle(dmcub);
}
-#endif
static enum bp_result set_pixel_clock_v7(
struct bios_parser *bp,
@@ -393,13 +384,12 @@ static enum bp_result set_pixel_clock_v7(
if (bp_params->signal_type == SIGNAL_TYPE_DVI_DUAL_LINK)
clk.miscinfo |= PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN;
-#ifdef CONFIG_DRM_AMD_DC_DMUB
if (bp->base.ctx->dc->ctx->dmub_srv &&
bp->base.ctx->dc->debug.dmub_command_table) {
set_pixel_clock_dmcub(bp->base.ctx->dmub_srv, &clk);
return BP_RESULT_OK;
}
-#endif
+
if (EXEC_BIOS_CMD_TABLE(setpixelclock, clk))
result = BP_RESULT_OK;
}
@@ -653,7 +643,7 @@ static void init_enable_disp_power_gating(
break;
}
}
-#ifdef CONFIG_DRM_AMD_DC_DMUB
+
static void enable_disp_power_gating_dmcub(
struct dc_dmub_srv *dmcub,
struct enable_disp_power_gating_parameters_v2_1 *pwr)
@@ -667,7 +657,7 @@ static void enable_disp_power_gating_dmcub(
dc_dmub_srv_cmd_execute(dmcub);
dc_dmub_srv_wait_idle(dmcub);
}
-#endif
+
static enum bp_result enable_disp_power_gating_v2_1(
struct bios_parser *bp,
enum controller_id crtc_id,
@@ -687,14 +677,13 @@ static enum bp_result enable_disp_power_gating_v2_1(
ps.param.enable =
bp->cmd_helper->disp_power_gating_action_to_atom(action);
-#ifdef CONFIG_DRM_AMD_DC_DMUB
if (bp->base.ctx->dc->ctx->dmub_srv &&
bp->base.ctx->dc->debug.dmub_command_table) {
enable_disp_power_gating_dmcub(bp->base.ctx->dmub_srv,
&ps.param);
return BP_RESULT_OK;
}
-#endif
+
if (EXEC_BIOS_CMD_TABLE(enabledisppowergating, ps.param))
result = BP_RESULT_OK;