diff options
| author | Aurabindo Pillai <aurabindo.pillai@amd.com> | 2023-09-26 00:07:33 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-10-05 01:42:41 +0300 |
| commit | 13c0e836316a03ab859f616b85cfe25c3d69d5db (patch) | |
| tree | 7fcc5e373450ecca935cf70420e6161b4e7ab327 /drivers/gpu/drm/amd/display/dc/dc_hw_types.h | |
| parent | 0653e02f4100f734011df8891097f88eb2df3a6e (diff) | |
| download | linux-13c0e836316a03ab859f616b85cfe25c3d69d5db.tar.xz | |
drm/amd/display: Adjust code style for hw_sequencer.h
[Why&How]
* Rearrange some definitions for consistency
* Drop legacy code
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_hw_types.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h index 100d62162b71..9649934ea186 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h @@ -769,9 +769,6 @@ struct dc_crtc_timing_flags { uint32_t LTE_340MCSC_SCRAMBLE:1; uint32_t DSC : 1; /* Use DSC with this timing */ -#ifndef TRIM_FSFT - uint32_t FAST_TRANSPORT: 1; -#endif uint32_t VBLANK_SYNCHRONIZABLE: 1; }; @@ -950,10 +947,6 @@ struct dc_crtc_timing { enum dc_aspect_ratio aspect_ratio; enum scanning_type scan_type; -#ifndef TRIM_FSFT - uint32_t fast_transport_output_rate_100hz; -#endif - struct dc_crtc_timing_flags flags; uint32_t dsc_fixed_bits_per_pixel_x16; /* DSC target bitrate in 1/16 of bpp (e.g. 128 -> 8bpp) */ struct dc_dsc_config dsc_cfg; |