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author | abdoulaye berthe <abdoulaye.berthe@amd.com> | 2019-07-19 17:25:39 +0300 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-11-13 23:29:43 +0300 |
commit | 8e5100a575433cc185a2e224280fbd873b6692dd (patch) | |
tree | 093aec8b5d7bdbcefdf4c6694463a662a43d6f6d /drivers/gpu/drm/amd/display/dc/dc_types.h | |
parent | 00ada9d14f386305abfad73665d235882768c78f (diff) | |
download | linux-8e5100a575433cc185a2e224280fbd873b6692dd.tar.xz |
drm/amd/display: initialize lttpr
[Description]
When reading link, update the procedure as follows:
1-Set aux timeout to extended: 3.2ms
2-Start with reading lttpr caps
3-Determine if lttpr support should be enabled. Reset aux timeout to
400us if no repeater is found.
Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_types.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_types.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 7ab7644458e7..837859e65e45 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -122,6 +122,7 @@ struct dc_context { #define DC_EDID_BLOCK_SIZE 128 #define MAX_SURFACE_NUM 4 #define NUM_PIXEL_FORMATS 10 +#define MAX_REPEATER_CNT 8 #include "dc_ddc_types.h" @@ -405,6 +406,41 @@ enum dpcd_downstream_port_max_bpc { DOWN_STREAM_MAX_12BPC, DOWN_STREAM_MAX_16BPC }; + + +enum link_training_offset { + DPRX = 0, + LTTPR_PHY_REPEATER1 = 1, + LTTPR_PHY_REPEATER2 = 2, + LTTPR_PHY_REPEATER3 = 3, + LTTPR_PHY_REPEATER4 = 4, + LTTPR_PHY_REPEATER5 = 5, + LTTPR_PHY_REPEATER6 = 6, + LTTPR_PHY_REPEATER7 = 7, + LTTPR_PHY_REPEATER8 = 8 +}; + +enum lttpr_mode { + phy_repeater_mode_transparent = 0x55, + phy_repeater_mode_non_transparent = 0xAA +}; + +enum lttpr_rev { + lttpr_rev_unknown = 0x0, + lttpr_rev_14 = 0x14, + lttpr_rev_max = 0x20 +}; + +struct dc_lttpr_caps { + enum lttpr_rev revision; + enum lttpr_mode mode; + uint8_t max_lane_count; + uint8_t max_link_rate; + uint8_t phy_repeater_cnt; + uint8_t max_ext_timeout; + uint8_t aux_rd_interval[MAX_REPEATER_CNT - 1]; +}; + struct dc_dongle_caps { /* dongle type (DP converter, CV smart dongle) */ enum display_dongle_type dongle_type; |