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| author | Charlene Liu <Charlene.Liu@amd.com> | 2020-09-21 21:24:09 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-10-05 22:16:50 +0300 |
| commit | b15cde19c32d8d543eae2e3cc7c51ba688b12551 (patch) | |
| tree | b3b16876d1ef7894246fb7d87506671a2a1eb58e /drivers/gpu/drm/amd/display/dc/dce | |
| parent | 54e8094a76bc8cd41d1ec5c2c2a8755e64349142 (diff) | |
| download | linux-b15cde19c32d8d543eae2e3cc7c51ba688b12551.tar.xz | |
drm/amd/display: Add i2c speed arbitration for dc_i2c and hdcp_i2c
[why]
HDCP 1.4 failed on SL8800 SW w/a test driver use.
[how]
Slow down the HW i2c speed when used by HW i2c.
This request: each acquired_i2c_engine setup the i2c speed needed
and sets the I2c engine for HDCP use at release_engine.
This covers SW using HW i2c engine and HDCP using HW i2c engine.
for dmcu using HW i2c engine, needs add similar logic in dmcu fw.
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c b/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c index 24adec407972..3e34afe8c504 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c @@ -299,8 +299,12 @@ static bool setup_engine( /* we have checked I2c not used by DMCU, set SW use I2C REQ to 1 to indicate SW using it*/ REG_UPDATE(DC_I2C_ARBITRATION, DC_I2C_SW_USE_I2C_REG_REQ, 1); + /*set SW requested I2c speed to default, if API calls in it will be override later*/ + set_speed(dce_i2c_hw, dce_i2c_hw->ctx->dc->caps.i2c_speed_in_khz); + if (dce_i2c_hw->setup_limit != 0) i2c_setup_limit = dce_i2c_hw->setup_limit; + /* Program pin select */ REG_UPDATE_6(DC_I2C_CONTROL, DC_I2C_GO, 0, @@ -339,8 +343,6 @@ static void release_engine( { bool safe_to_reset; - /* Restore original HW engine speed */ - set_speed(dce_i2c_hw, dce_i2c_hw->default_speed); /* Reset HW engine */ { @@ -360,6 +362,9 @@ static void release_engine( /* HW I2c engine - clock gating feature */ if (!dce_i2c_hw->engine_keep_power_up_count) REG_UPDATE_N(SETUP, 1, FN(SETUP, DC_I2C_DDC1_ENABLE), 0); + + /*for HW HDCP Ri polling failure w/a test*/ + set_speed(dce_i2c_hw, dce_i2c_hw->ctx->dc->caps.i2c_speed_in_khz_hdcp); /* Release I2C after reset, so HW or DMCU could use it */ REG_UPDATE_2(DC_I2C_ARBITRATION, DC_I2C_SW_DONE_USING_I2C_REG, 1, DC_I2C_SW_USE_I2C_REG_REQ, 0); |