diff options
author | Michael Strauss <michael.strauss@amd.com> | 2022-06-09 17:45:34 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-07-26 00:16:45 +0300 |
commit | 1c5a2fa97b91d37375f4fc8aeb37c9456c93c828 (patch) | |
tree | 61fd64e7e004bb9ba3467e79bbb7a3261d5d9431 /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | |
parent | cb849b4dc73d414149fea96330cdf96a82919fc9 (diff) | |
download | linux-1c5a2fa97b91d37375f4fc8aeb37c9456c93c828.tar.xz |
drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding
[WHY]
DP DTO isn't used for 128b/132b encoding
[HOW]
Check current link rate to determine whether using 8b/10b or 128/132b encoding
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 7a3812604e4b..bed783747f16 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -892,6 +892,7 @@ enum dc_status dcn10_enable_stream_timing( if (false == pipe_ctx->clock_source->funcs->program_pix_clk( pipe_ctx->clock_source, &pipe_ctx->stream_res.pix_clk_params, + dp_get_link_encoding_format(&pipe_ctx->link_config.dp_link_settings), &pipe_ctx->pll_settings)) { BREAK_TO_DEBUGGER(); return DC_ERROR_UNEXPECTED; |