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authorAshley Thomas <Ashley.Thomas2@amd.com>2020-10-01 10:16:05 +0300
committerAlex Deucher <alexander.deucher@amd.com>2020-10-26 20:27:52 +0300
commit9248681f68b725d2647ca7dbae281c9b34977519 (patch)
tree7e723507977e32a4438b70cfea2cf230767d933d /drivers/gpu/drm/amd/display/dc/dcn10
parent2e7b43e629100b4072fac5eef53bd28235e59aa3 (diff)
downloadlinux-9248681f68b725d2647ca7dbae281c9b34977519.tar.xz
drm/amd/display: Source minimum HBlank support
[Why] Some sink devices wish to have access to the minimum HBlank supported by the ASIC. [How] Make the ASIC minimum HBlank available in Source Device information address 0x340. Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 634171f63a2f..e74bb2735885 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -1418,6 +1418,7 @@ static bool dcn10_resource_construct(
dc->caps.i2c_speed_in_khz = 100;
dc->caps.i2c_speed_in_khz_hdcp = 100; /*1.4 w/a not applied by default*/
dc->caps.max_cursor_size = 256;
+ dc->caps.min_horizontal_blanking_period = 80;
dc->caps.max_slave_planes = 1;
dc->caps.is_apu = true;
dc->caps.post_blend_color_processing = false;