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authorAlvin Lee <Alvin.Lee2@amd.com>2022-09-02 01:54:22 +0300
committerAlex Deucher <alexander.deucher@amd.com>2022-09-19 22:12:39 +0300
commitb0d6de32e30c635aac22e52357b090982d94df52 (patch)
tree07b7b6b2ebe76affb9ac825d86c6842addb41035 /drivers/gpu/drm/amd/display/dc/dcn20
parent6eef37460584269b240f45aa47ebb61aae848082 (diff)
downloadlinux-b0d6de32e30c635aac22e52357b090982d94df52.tar.xz
drm/amd/display: SubVP pipe split case
[Why and How] For SubVP pipe split case, pass in split index for main and phantom pipes to ensure that the P-State sequence will force P-State for all required pipes. Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 86ab3a71c67b..ab56f14d6247 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1906,10 +1906,13 @@ void dcn20_post_unlock_program_front_end(
* can underflow due to HUBP_VTG_SEL programming if done in the regular front end
* programming sequence).
*/
- if (pipe->stream && pipe->stream->mall_stream_config.type == SUBVP_PHANTOM) {
- if (dc->hwss.update_phantom_vp_position)
- dc->hwss.update_phantom_vp_position(dc, context, pipe);
- dcn20_program_pipe(dc, pipe, context);
+ while (pipe) {
+ if (pipe->stream && pipe->stream->mall_stream_config.type == SUBVP_PHANTOM) {
+ if (dc->hwss.update_phantom_vp_position)
+ dc->hwss.update_phantom_vp_position(dc, context, pipe);
+ dcn20_program_pipe(dc, pipe, context);
+ }
+ pipe = pipe->bottom_pipe;
}
}
}