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authorJoshua Aberback <joshua.aberback@amd.com>2020-04-30 02:01:14 +0300
committerAlex Deucher <alexander.deucher@amd.com>2020-10-05 22:16:30 +0300
commit3e19095534caec6be8f8c1a7d8fd4879e23637ed (patch)
treee586f46680328f59140ead02872b3f8d9a75fce8 /drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
parentfe984cb3dd325c4c5c7c360e43d93608d4d8870a (diff)
downloadlinux-3e19095534caec6be8f8c1a7d8fd4879e23637ed.tar.xz
drm/amd/display: Force enable pstate on driver unload
[Why] During driver unload, it is expected that p-state switching is supported. If it's not supported, PMFW will hang due to a forced p-state switch. Even if the current timing does not support p-state normally, we still want to force allow because the worst that can happen is underflow. This will match Navi10 behaviour. [How] - new hubbub func to control the force pstate register - force allow when releasing display ownership - registers are inaccessible after due to m_cgs.hwNotAvailable - explicitly disable force signal during hw_init - if driver is disabled and re-enabled, register not cleared otherwise Also, remove DCN3 part of dcn10_init_hw, we will not be going back to it. Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
index 7c90c2222506..ae7a789bf6e6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
@@ -93,6 +93,7 @@ static const struct hw_sequencer_funcs dcn30_funcs = {
.apply_idle_power_optimizations = dcn30_apply_idle_power_optimizations,
.set_backlight_level = dcn21_set_backlight_level,
.set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
+ .hardware_release = dcn30_hardware_release,
};
static const struct hwseq_private_funcs dcn30_private_funcs = {