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| author | Su Sung Chung <Su.Chung@amd.com> | 2019-05-22 21:28:52 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-18 22:18:09 +0300 |
| commit | c1f2e0154065963f95ce22e03ff05a420cb3aac7 (patch) | |
| tree | 9dca5915377f65489baebf0428692ecf7931e6f9 /drivers/gpu/drm/amd/display/dc/dm_services.h | |
| parent | 29344d152d0a7a54945606d9065c5de79161f100 (diff) | |
| download | linux-c1f2e0154065963f95ce22e03ff05a420cb3aac7.tar.xz | |
drm/amd/display: refactor dump_clk_registers
[why]
for 2 purposes:
1. get raw register value dumped on the log, which will make it easier
to talk to other team who only knows about the register
2. enable other HW to be able to use the same interface as raven to log
clock register data
Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dm_services.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dm_services.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h index b426ba02b793..1a0429744630 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_services.h +++ b/drivers/gpu/drm/amd/display/dc/dm_services.h @@ -151,6 +151,7 @@ void generic_reg_wait(const struct dc_context *ctx, unsigned int delay_between_poll_us, unsigned int time_out_num_tries, const char *func_name, int line); +unsigned int snprintf_count(char *pBuf, unsigned int bufSize, char *fmt, ...); /* These macros need to be used with soc15 registers in order to retrieve * the actual offset. |