diff options
| author | Bing Guo <Bing.Guo@amd.com> | 2021-09-28 01:39:11 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-11-03 19:32:34 +0300 |
| commit | 1fc31638eb79eff8b1fb0e1bfcd5f9dbddbf16e2 (patch) | |
| tree | f098bcae898192e3965bd5409a908d84c2bc37cb /drivers/gpu/drm/amd/display/dc/dml/dcn30 | |
| parent | bca5bea4030d59b2d100c997b8044033247c1a99 (diff) | |
| download | linux-1fc31638eb79eff8b1fb0e1bfcd5f9dbddbf16e2.tar.xz | |
drm/amd/display: Fix bpc calculation for specific encodings
[Why]
1. YCbCr 4:2:2 8bpc/10bpc modes are blocked for HDMI by policy
2. A YCbCr 4:2:0 calculation error blocked some 4:2:0 timing modes
[How]
YCbCr 4:2:2 8bpc/10bpc modes are allowed for HDMI
Fix YCbCr 4:2:0 calculation error
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Bing Guo <Bing.Guo@amd.com>
Reviewed-by: Chris Park <chris.park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml/dcn30')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c index e3d9f1decdfc..f47d82da115c 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c @@ -3576,16 +3576,9 @@ static double TruncToValidBPP( MinDSCBPP = 8; MaxDSCBPP = 3 * DSCInputBitPerComponent - 1.0 / 16; } else { - if (Output == dm_hdmi) { - NonDSCBPP0 = 24; - NonDSCBPP1 = 24; - NonDSCBPP2 = 24; - } - else { - NonDSCBPP0 = 16; - NonDSCBPP1 = 20; - NonDSCBPP2 = 24; - } + NonDSCBPP0 = 16; + NonDSCBPP1 = 20; + NonDSCBPP2 = 24; if (Format == dm_n422) { MinDSCBPP = 7; |