diff options
| author | Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> | 2021-01-19 22:10:21 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-01-21 17:54:26 +0300 |
| commit | 7fc75382ec687e43efa0232c8b9b5bffa6b57dcd (patch) | |
| tree | 8b464e6ba27276042ca44254c8b5112816c58c7b /drivers/gpu/drm/amd/display/dc/inc | |
| parent | b153d8d7d08f2f298bf48695ae3d945aefe5e5fd (diff) | |
| download | linux-7fc75382ec687e43efa0232c8b9b5bffa6b57dcd.tar.xz | |
drm/amd/display: Dynamic cursor cache size for MALL eligibility check
[Why]
Currently we use the maximum possible cursor cache size when deciding if we
should attempt to enable MALL, but this prevents us from enabling the
feature for certain key use cases.
[How]
- consider cursor bpp when calculating if the cursor fits
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h index 48378beb71c0..0586ab2ffd6a 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h @@ -218,7 +218,8 @@ struct hw_sequencer_funcs { /* Idle Optimization Related */ bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable); - bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane); + bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane, + struct dc_cursor_attributes *cursor_attr); bool (*is_abm_supported)(struct dc *dc, struct dc_state *context, struct dc_stream_state *stream); |