diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2018-04-18 16:09:35 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-15 21:43:47 +0300 |
commit | d389d607e60809726fe818113c80f5fc3aac4675 (patch) | |
tree | 7e3b331ae8624a284881245346dd94f05c3ff3f2 /drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | |
parent | ca6e0c5bdc44a2cd7152002191a8107fc566084f (diff) | |
download | linux-d389d607e60809726fe818113c80f5fc3aac4675.tar.xz |
drm/amd/pp: Change voltage/clk range for OD feature on VI
read vddc range from vbios.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c index 971fb5dfb620..d58be7eb8256 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c @@ -1505,3 +1505,31 @@ int atomctrl_get_leakage_vddc_base_on_leakage(struct pp_hwmgr *hwmgr, return 0; } + +void atomctrl_get_voltage_range(struct pp_hwmgr *hwmgr, uint32_t *max_vddc, + uint32_t *min_vddc) +{ + void *profile; + + profile = smu_atom_get_data_table(hwmgr->adev, + GetIndexIntoMasterTable(DATA, ASIC_ProfilingInfo), + NULL, NULL, NULL); + + if (profile) { + switch (hwmgr->chip_id) { + case CHIP_TONGA: + case CHIP_FIJI: + *max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMaxVddc/4); + *min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMinVddc/4); + break; + case CHIP_POLARIS11: + case CHIP_POLARIS10: + case CHIP_POLARIS12: + *max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMaxVddc/100); + *min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMinVddc/100); + break; + default: + return; + } + } +} |