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authorSean Paul <seanpaul@chromium.org>2019-07-17 19:01:48 +0300
committerSean Paul <seanpaul@chromium.org>2019-07-17 19:45:30 +0300
commit57a1b0893782090738a879293efeb93885e0519c (patch)
treea87b0bd724301cd4695ba04b4c2f890b985de6b3 /drivers/gpu/drm/drm_dp_helper.c
parent9aef5867c86c7bfad92f4208f2ad673de359f51b (diff)
downloadlinux-57a1b0893782090738a879293efeb93885e0519c.tar.xz
drm: Make the bw/link rate calculations more forgiving
Although the DisplayPort spec explicitly calls out the 1.62/2.7/5.4/8.1 link rates, the value of LINK_BW_SET is calculated. The DisplayPort spec says "Main-Link Bandwidth Setting = Value x 0.27Gbps/lane". A bridge that we're looking to upstream uses 6.75Gbps rate (value 0x19) [1], and that precludes it from using these functions. This 6.75Gbps rate is defined in the spec as (credit to Ville for posting this): A MyDP Source device, upon reading the MAX_LINK_RATE register of the downstream DPRX programmed to 19h (which can be the case only for a MyDP-to-Legacy or MyDP-to-DP lane count converter) can program the LINK_BW_SET register (DPCD Address 00100h) to 19h to enable 6.75Gbps/lane." So to avoid failing on legitimate rates in the future, this patch calculates thevalues according to spec instead of restricting these values to one of the DP_LINK_BW_* #defines. No functional change for the well-defined values, but we lose the warning (and return the correct value) for ill-defined bw values. Signed-off-by: Sean Paul <seanpaul@chromium.org> [1] https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/1689251/2/drivers/gpu/drm/bridge/analogix/anx7625.c#636 Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190717160148.256826-1-sean@poorly.run
Diffstat (limited to 'drivers/gpu/drm/drm_dp_helper.c')
-rw-r--r--drivers/gpu/drm/drm_dp_helper.c31
1 files changed, 4 insertions, 27 deletions
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 0b994d083a89..ffc68d305afe 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -152,38 +152,15 @@ EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
u8 drm_dp_link_rate_to_bw_code(int link_rate)
{
- switch (link_rate) {
- default:
- WARN(1, "unknown DP link rate %d, using %x\n", link_rate,
- DP_LINK_BW_1_62);
- /* fall through */
- case 162000:
- return DP_LINK_BW_1_62;
- case 270000:
- return DP_LINK_BW_2_7;
- case 540000:
- return DP_LINK_BW_5_4;
- case 810000:
- return DP_LINK_BW_8_1;
- }
+ /* Spec says link_bw = link_rate / 0.27Gbps */
+ return link_rate / 27000;
}
EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
int drm_dp_bw_code_to_link_rate(u8 link_bw)
{
- switch (link_bw) {
- default:
- WARN(1, "unknown DP link BW code %x, using 162000\n", link_bw);
- /* fall through */
- case DP_LINK_BW_1_62:
- return 162000;
- case DP_LINK_BW_2_7:
- return 270000;
- case DP_LINK_BW_5_4:
- return 540000;
- case DP_LINK_BW_8_1:
- return 810000;
- }
+ /* Spec says link_rate = link_bw * 0.27Gbps */
+ return link_bw * 27000;
}
EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);