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authorInki Dae <inki.dae@samsung.com>2014-08-13 11:38:23 +0400
committerInki Dae <daeinki@gmail.com>2014-09-19 19:56:08 +0400
commitd87f09abb31d2d52dda261b5128c39d3944afbab (patch)
tree77cdb61cb54844891470c2b933f12bb2e4b119d8 /drivers/gpu/drm/drm_mipi_dsi.c
parent8525b5ec90a58b3e56709ffa1667d6593dbe24c3 (diff)
downloadlinux-d87f09abb31d2d52dda261b5128c39d3944afbab.tar.xz
drm/mipi-dsi: consider low power transmission
This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM so that host driver of each SoC can clear or set relevant register bit for low power transmission. All host drivers shall support continuous clock behavior on the Clock Lane, and optionally may support non-continuous clock behavior. Both of them can transmit data in high speed of low power. With each clock behavior, non-continuous or continuous clock mode, host controller will transmit data in high speed by default so if peripheral wants to receive data in low power, the peripheral driver should set MIPI_DSI_MODE_LPM flag. Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/drm_mipi_dsi.c')
-rw-r--r--drivers/gpu/drm/drm_mipi_dsi.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 6aa6a9e95570..eb6dfe52cab2 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -231,6 +231,9 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data,
break;
}
+ if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+ msg.flags = MIPI_DSI_MSG_USE_LPM;
+
return ops->transfer(dsi->host, &msg);
}
EXPORT_SYMBOL(mipi_dsi_dcs_write);
@@ -260,6 +263,9 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
if (!ops || !ops->transfer)
return -ENOSYS;
+ if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+ msg.flags = MIPI_DSI_MSG_USE_LPM;
+
return ops->transfer(dsi->host, &msg);
}
EXPORT_SYMBOL(mipi_dsi_dcs_read);