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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2021-03-23 18:49:51 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2021-03-24 13:39:46 +0300
commit2c8ab3339e398bbbcb0980933e266b93bedaae52 (patch)
tree29c108ecd9bdcb2c6e53d71b0341a39b7a13449a /drivers/gpu/drm/i915/gt/intel_timeline.h
parent12ca695d2c1ed26b2dcbb528b42813bd0f216cfc (diff)
downloadlinux-2c8ab3339e398bbbcb0980933e266b93bedaae52.tar.xz
drm/i915: Pin timeline map after first timeline pin, v4.
We're starting to require the reservation lock for pinning, so wait until we have that. Update the selftests to handle this correctly, and ensure pin is called in live_hwsp_rollover_user() and mock_hwsp_freelist(). Changes since v1: - Fix NULL + XX arithmatic, use casts. (kbuild) Changes since v2: - Clear entire cacheline when pinning. Changes since v3: - CACHELINE_BYTES -> TIMELINE_SEQNO_BYTES. (jekstrand) Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210323155059.628690-3-maarten.lankhorst@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_timeline.h')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_timeline.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.h b/drivers/gpu/drm/i915/gt/intel_timeline.h
index dcdee692a80e..eb015e8dc3ac 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.h
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.h
@@ -117,4 +117,6 @@ intel_timeline_is_last(const struct intel_timeline *tl,
return list_is_last_rcu(&rq->link, &tl->requests);
}
+I915_SELFTEST_DECLARE(int intel_timeline_pin_map(struct intel_timeline *tl));
+
#endif