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authorAnshuman Gupta <anshuman.gupta@intel.com>2019-08-11 13:02:32 +0300
committerImre Deak <imre.deak@intel.com>2019-08-12 12:04:24 +0300
commit015341da9888b58fbdeafd369c43f7a95fe4e763 (patch)
tree0e9394e209b63501d27a30fe9c4cae4cde87659e /drivers/gpu/drm/i915/gt/uc/intel_huc.h
parent2e04dbceed682a97c44cf50fd73c7cfc79e208ea (diff)
downloadlinux-015341da9888b58fbdeafd369c43f7a95fe4e763.tar.xz
drm/i915/tgl: Fixing up list of PG3 power domains.
The DDI-IO power wells (PWR_WELL_CTL_DDI) are backing the IO/PHY functionality, which doesn't need the PG3 power power well. Accordingly fixing up the list of PG3 power domains. Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190811100232.27964-1-anshuman.gupta@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/uc/intel_huc.h')
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