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author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-09-09 16:11:46 +0300 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-09-09 16:23:01 +0300 |
commit | 70c2a24dbfd28eb9b905b369679b32a74361d7ac (patch) | |
tree | 5c083d0a846b1aa0720566cd6536d7aa340da732 /drivers/gpu/drm/i915/i915_gem_request.h | |
parent | bbd6c47e114f30dbe26018694059f2491c22271c (diff) | |
download | linux-70c2a24dbfd28eb9b905b369679b32a74361d7ac.tar.xz |
drm/i915: Simplify ELSP queue request tracking
Emulate HW to track and manage ELSP queue. A set of SW ports are defined
and requests are assigned to these ports before submitting them to HW. This
helps in cleaning up incomplete requests during reset recovery easier
especially after engine reset by decoupling elsp queue management. This
will become more clear in the next patch.
In the engine reset case we want to resume where we left-off after skipping
the incomplete batch which requires checking the elsp queue, removing
element and fixing elsp_submitted counts in some cases. Instead of directly
manipulating the elsp queue from reset path we can examine these ports, fix
up ringbuffer pointers using the incomplete request and restart submissions
again after reset.
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1470414607-32453-3-git-send-email-arun.siluvery@linux.intel.com
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160909131201.16673-6-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_request.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_request.h | 21 |
1 files changed, 1 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_request.h b/drivers/gpu/drm/i915/i915_gem_request.h index 2faa3bb4c39b..a231bd318ef0 100644 --- a/drivers/gpu/drm/i915/i915_gem_request.h +++ b/drivers/gpu/drm/i915/i915_gem_request.h @@ -137,27 +137,8 @@ struct drm_i915_gem_request { /** file_priv list entry for this request */ struct list_head client_list; - /** - * The ELSP only accepts two elements at a time, so we queue - * context/tail pairs on a given queue (ring->execlist_queue) until the - * hardware is available. The queue serves a double purpose: we also use - * it to keep track of the up to 2 contexts currently in the hardware - * (usually one in execution and the other queued up by the GPU): We - * only remove elements from the head of the queue when the hardware - * informs us that an element has been completed. - * - * All accesses to the queue are mediated by a spinlock - * (ring->execlist_lock). - */ - - /** Execlist link in the submission queue.*/ + /** Link in the execlist submission queue, guarded by execlist_lock. */ struct list_head execlist_link; - - /** Execlists no. of times this request has been sent to the ELSP */ - int elsp_submitted; - - /** Execlists context hardware id. */ - unsigned int ctx_hw_id; }; extern const struct fence_ops i915_fence_ops; |