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authorMatt Roper <matthew.d.roper@intel.com>2020-05-02 00:37:01 +0300
committerMatt Roper <matthew.d.roper@intel.com>2020-05-06 00:26:46 +0300
commit9b2383a7ac082cf71d4fc462c3ec6d5939cf6a04 (patch)
tree54544f66a52cb15f151fabed0a7f776bf6215b21 /drivers/gpu/drm/i915/i915_irq.c
parent977253df6433f85d5e2cb3ab0f8eb4127f8173dd (diff)
downloadlinux-9b2383a7ac082cf71d4fc462c3ec6d5939cf6a04.tar.xz
drm/i915/icp: Add Wa_14010685332
We need to toggle a SDE chicken bit on and then off as the final step when disabling interrupts in preparation for runtime suspend. Bspec: 33450 Bspec: 8402 Cc: Bob Paauwe <bob.j.paauwe@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200501213701.371443-1-matthew.d.roper@intel.com Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 0b8b0c069ce3..ea4c87784a27 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2870,6 +2870,14 @@ static void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
GEN3_IRQ_RESET(uncore, SDE);
+
+ /* Wa_14010685332:icl */
+ if (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) {
+ intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
+ SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
+ intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
+ SBCLK_RUN_REFCLK_DIS, 0);
+ }
}
static void gen11_irq_reset(struct drm_i915_private *dev_priv)