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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-10-01 15:32:03 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-10-01 17:26:19 +0300 |
| commit | 7651a4452ddf8ace48defd473ead6effe35059c7 (patch) | |
| tree | 4a9723c8b0bfb0f40c0b5df53db3ebb2421141ab /drivers/gpu/drm/i915/i915_scheduler.h | |
| parent | 567a605705893afdffcedd35a0ba766f52604d94 (diff) | |
| download | linux-7651a4452ddf8ace48defd473ead6effe35059c7.tar.xz | |
drm/i915: Reserve some priority bits for internal use
In the next few patches, we will want to give a small priority boost to
some requests/queues but not so much that we perturb the user controlled
order. As such we will shift the user priority bits higher leaving
ourselves a few low priority bits for our internal bumping.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181001123204.23982-3-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_scheduler.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_scheduler.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h index 70a42220358d..89d456312557 100644 --- a/drivers/gpu/drm/i915/i915_scheduler.h +++ b/drivers/gpu/drm/i915/i915_scheduler.h @@ -19,6 +19,12 @@ enum { I915_PRIORITY_INVALID = INT_MIN }; +#define I915_USER_PRIORITY_SHIFT 0 +#define I915_USER_PRIORITY(x) ((x) << I915_USER_PRIORITY_SHIFT) + +#define I915_PRIORITY_COUNT BIT(I915_USER_PRIORITY_SHIFT) +#define I915_PRIORITY_MASK (I915_PRIORITY_COUNT - 1) + struct i915_sched_attr { /** * @priority: execution and service priority |