diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2015-01-12 21:14:29 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-01-15 03:35:48 +0300 |
| commit | c8e68b7e0e87515eae1c00952ff0f4e2d68c6813 (patch) | |
| tree | 0796c0c2eba4f06efa960d0d32286420341137d0 /drivers/gpu/drm/i915/intel_psr.c | |
| parent | 46c3fce60be8d14ce4d18cad93d94788480c7a87 (diff) | |
| download | linux-c8e68b7e0e87515eae1c00952ff0f4e2d68c6813.tar.xz | |
drm/i915: PSR VLV/CHV: Remove condition checks that only applies to Haswell.
These conditions applies only to Haswell and we were also checking for them
on Valleyview/Cherryview.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_psr.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index afb8b8ce8d9f..3dd88861f417 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -270,22 +270,19 @@ static bool intel_psr_match_conditions(struct intel_dp *intel_dp) return false; } - /* Below limitations aren't valid for Broadwell */ - if (IS_BROADWELL(dev)) - goto out; - - if (I915_READ(HSW_STEREO_3D_CTL(intel_crtc->config.cpu_transcoder)) & - S3D_ENABLE) { + if (IS_HASWELL(dev) && + I915_READ(HSW_STEREO_3D_CTL(intel_crtc->config.cpu_transcoder)) & + S3D_ENABLE) { DRM_DEBUG_KMS("PSR condition failed: Stereo 3D is Enabled\n"); return false; } - if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) { + if (IS_HASWELL(dev) && + intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) { DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n"); return false; } - out: dev_priv->psr.source_ok = true; return true; } |